1. Field of the Invention
The present invention relates to Serial Advanced Technology Attachment (SATA) storage devices and controllers and more specifically relates to efficient methods and structures for storing task file information (e.g., command block register information and control block register information) for a large number of SATA devices.
2. Discussion of Related Art
AT attachment and AT attachment with packet interface (ATA and ATAPI, respectively) have been, and remain, widely accepted standards for coupling disk drives to storage controller devices associated with host systems. The ATA and ATAPI specifications utilize standardized register definitions for exchanging information between a compliant storage controller and one or more storage devices (i.e., disk drives or other compliant storage devices). Originally, these registers were referred to collectively as a “task file”. Later evolutionary developments of the ATA and ATAPI specifications began referring to these registers in separate portions as command block registers and control block registers. Some of the registers provide command or control information to the storage device while others record status information from the storage device. As used herein, “task file” refers to the earlier register definitions as well as the later evolutionary definitions of command block registers and control block registers.
The host storage controller interacts with each storage device in accordance with information exchanged through the corresponding task file (i.e., the corresponding register values). Various of the register values corresponding to each device are key to operation of state machines or other control logic defined by the ATA and ATAPI specifications for proper interaction between the storage device and the corresponding storage controller. Since a single ATA or ATAPI compliant storage controller may interact with multiple ATA or ATAPI compliant storage devices, the state information for each device reflected in the task file for each device was generally saved within the storage controller to assure continued, proper operation of the state machine as multiple devices would asynchronously interact with the storage controller. Further, a storage controller may process requests substantially in parallel (concurrently) on behalf of multiple clients (multiple requests from one or more host system processes). Each client may access one or more devices and each device may be accessed by one or more such clients.
Historically, storage controllers compliant with the ATA or ATAPI specifications would store task file information for each of the multiple storage devices with which the storage controller may interact. This saved task file information within the storage controller typically utilize register logic structures based on multiple flip flops and corresponding combinatorial logic to store task file information for each device. Typical storage controllers designed for ATA and ATAPI compliant devices permitted storage of task file information for up to eight storage devices.
Later developments in storage devices utilized ATA or ATAPI compliant register exchanges encapsulated within Serial Attached SCSI (SAS) protocol and communication architectures. So-called Serial ATA (SATA) protocols were developed to utilize high speed serial interfaces and have been applied with the SAS specifications to exchange information using the ATA or ATAPI register oriented command and control structures. A SATA controller or host adapter, like the earlier ATA or ATAPI storage controllers, therefore required storage of task file information for multiple SATA devices under its control. Utilizing the legacy approach of register and flip flop based storage components presents numerous problems in expanding the number of SATA devices under the control of a SATA storage controller or host bus adapter. In accordance with SATA specifications utilizing SAS transmission protocols, as many as 4096 SAS devices could be supported any of which could be compliant with SATA protocol specifications. Even a minimal, first generation, SAS compliant storage controller or host bus adapter was capable of supporting at least 128 SATA devices. Creating register structures to store task file information for each of such numerous SATA devices utilized a substantial portion of the silicon surface area of an integrated circuit or other discrete circuit structures within the SAS storage controller or host bus adapter. Such register file constructs, though simple and relatively inexpensive for a small number of registers, adds significant cost and complexity where the number of storage devices, and hence the number of related register files, grows dramatically.
It is evident from the above discussion that a need exists for improved methods and structures for storing task file information for a large number of SATA devices in a high speed SAS storage environment.